Parallel LFSR Generator

Generate parallel Galois linear feedback shift registers (LFSRs) for implementing cyclic codes like CRC in hardware.

The parallel version is computed by executing the LFSR symbolically. Instead of feeding the LFSR the ones and zeros of a data word, the LFSR is fed the bits of the data word symbolically. For example, for a 8-bit data word, the LFSR is fed the symbols d[7], d[6], ..., d[0] instead of the actual ones and zeros.

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References

Galois LFSRs
https://en.wikipedia.org/wiki/Linear-feedback_shift_register#Galois_LFSRs
Cyclic redundancy check
https://en.wikipedia.org/wiki/Cyclic_redundancy_check
Computation of cyclic redundancy checks
https://en.wikipedia.org/wiki/Computation_of_cyclic_redundancy_checks
Easics CRC Generation Tool
https://www.easics.com/webtools/crctool